1. Field of the Invention
The invention relates to a chip antenna and an antenna unit including the same, and more particularly to a mono-pole antenna having a reduced size.
Herein, a mono-pole antenna is an antenna grounded at such a portion that a dipole antenna has a maximum current amplitude at a middle, and forming electric images by grounding portions of the dipole other than the middle. A dipole antenna has a radiation pattern having polarities at opposite ends which polarities are opposite to each other, and having a peak in a direction perpendicular to the dipole antenna.
2. Description of the Related Art
Though a lot of electronic devices have been reduced in both size and weight, an antenna is not yet remarkably reduced in size. This is because that an antenna would have a high gain if it had a wide area, whereas an antenna would have a small gain if it was reduced in size, and accordingly, had a small area. If reduced in size, an antenna would have a deteriorated impedance characteristic, and in particular, would have a reduced input resistance. As a result, there is caused a problem that power fed from a communication device is reflected at an input of an antenna, and resultingly, power radiated as electromagnetic waves is reduced.
With rapid popularization of a personal computer and a cellular phone, an antenna is requested to be fabricated in a smaller size and have higher performance in order to satisfy a need of communication between perso computers or communication between personal areas through bluetooth.
As an antenna which can be reduced in size with a length thereof being kept in a certain length, there is known an antenna having a mianda line or a helical line, that is, a mianda-shaped antenna (also referred to as xe2x80x9cmeander-shapedxe2x80x9d in the art) or a helically shaped antenna.
For instance, Japanese Unexamined Patent Publication No. 9-55618 has suggested a chip antenna having a mianda line. The suggested chip antenna is illustrated in FIG. 1.
The chip antenna 100 is comprised of a rectangular-parallelopiped substrate 101 comprised of a multi-layered dielectric layers, and an electrical conductor 104 formed on a surface 107 of the substrate 101.
The electrical conductor 104 has an end 102 through which power is fed to the chip antenna 100, and an open end 103, and has a mianda-structure having 10 corners. The electrical conductor 104 is formed on the surface 107 of the substrate 101 by printing, evaporation, adhering or plating. The mianda-shaped electrical conductor 104 extends from a first edge 101a to a second edge 101b extending in parallel with the first edge 101a. 
The substrate 101 has a first side surface 108 and a second side surface 109 oppositely facing the first side surface 108. A power-feeding terminal 105 is formed on the first side surface 108, and a fixation terminal 106 is formed on the second side surface 109. The electrical conductor 104 is electrically connected to the power-feeding terminal 105 through the end 102, and the substrate 101 is fixed onto a circuit board (not illustrated) on which external circuits are fabricated, through the fixation terminals 106.
It is necessary to apply an intensive current to an antenna for radiating electromagnetic waves therefrom. A current is generally applied to an antenna at a power-feeding point. In addition, it is necessary for the power-feeding point to have such a length that a radiation resistance is equal to 50 ohms, in order to match the antenna to a power-feeder. The rest of the antenna other than the power-feeding point is necessary only for generating an intensive current at predetermined frequency by resonating the rest of the antenna.
From the above-mentioned standpoint, Japanese Unexamined Patent Publication No. 2000-188506 has suggested an antenna which attempts to shorten a length of the antenna by replacing the rest of the antenna other than a power-feeding point with a reactance device. The antenna suggested in the Publication is illustrated in FIG. 2.
As illustrated in FIG. 2, a linear electrical conductor pattern 112 is electrically connected at one end to a power-feeding point 113, and at the other end to a reactance device 114. The reactance device 114 is comprised of an electrical conductor having a first length in a length-wise direction which first length is longer than a second length perpendicular to the first length, such as a mianda-shaped electrical conductor. The reactance device 114 is mounted on an upper surface of a printed substrate 110 in an area where a ground pattern 111 is not formed in both upper and lower surfaces of the printed substrate 110. The reactance device 114 and the linear electrical conductor 112 extend perpendicularly to each other, and forms reverse-L-shaped configuration.
However, the above-mentioned Japanese Unexamined Patent Publication No. 9-55618 is accompanied with the following problems.
In the Publication, the chip antenna 100 is resonated by introducing electromagnetic waves into the electrical conductor 104 having a length equal to a quarter of a wavelength of the electromagnetic waves. To this end, the electrical conductor 104 has to be reciprocated many times. This results in an increase in a length of the electrical conductor 104, causing a bar in fabricating the chip antenna 100 in a small size.
In addition, the electrical conductor 104 has to be bent a lot of time in order to accommodate a longer electrical conductor 104 into a smaller space, resulting in a smaller space between adjacent electrical conductors 104. Thus, electromagnetic coupling between adjacent electrical conductors 104 is strengthened, causing an increase in both radio-frequency loss and dielectric loss in the electrical conductor 104 and a current running on a surface of the electrical conductor 104. As a result, both a radiation efficiency and a gain of the chip antenna 100 would be reduced.
Since a mono-pole antenna is located in an open space, the mono-pole antenna is likely to be electromagnetically coupled to a metal located therearound, and hence, the antenna characteristic is likely to change in dependence on surroundings. Accordingly, it is necessary for a mono-pole antenna to be designed to have a wide band width taking misregistration in mounting a mono-pole antenna into consideration.
However, since the chip antenna 100 is intended to be reduced in size by shortening a space between adjacent electrical conductors 104 in the above-mentioned Japanese Unexamined Patent Publication No. 9-55618, electromagnetic energy to be generated between electrical conductors 104 would be increased. The thus increased electromagnetic energy would cause a band width narrower, resulting in that the antenna characteristic is readily varied by surrounding metal parts existing around the chip antenna 100.
The antenna suggested in the above-mentioned Japanese Unexamined Patent Publication No. 2000-188506 is accompanied with the following problems.
The antenna includes the reactance device. However, since the reactance device is a separate part, the use of the reactance device would increase a total cost of fabricating the antenna.
In addition, it would be quite difficult to accurately analyze an operation of the antenna, if the antenna is comprised of two different parts. This may result in that the antenna would not operate in a designed manner.
In view of the above-mentioned problems in the conventional antennas, it is the first object of the present invention to provide a chip antenna and an antenna unit both of which have a wide band width though they are small in size, are hardly influenced by surrounding parts, and can be readily mounted on a substrate.
The second object of the present invention is to provide a chip antenna and an antenna unit both of which presents high radiation efficiency and high gain with a small loss.
The third object of the present invention is to provide a chip antenna and an antenna unit both of which have a simple structure, can be fabricated in the small number of steps with low costs, and can be accurately analyzed.
The fourth object of the present invention is to provide a chip antenna and an antenna unit both of which can carry out multifrequency operation with the above-mentioned merits being maintained.
In one aspect of the present invention, there is provided a chip antenna including (a) a first electrical conductor having a first end, (b) a second electrical conductor extending in parallel with the first electrical conductor and having a second end located in alignment with the first end, and (c) a third electrical conductor extending between the first and second ends perpendicularly to the first and second electrical conductors, the first to third electrical conductors being integrally formed, power being fed to one of the first and second electrical conductors.
The first to third electrical conductors arranged in the above-mentioned manner reduce electromagnetic coupling, a current running on a surface of a substrate, and distributed capacitance, and thus, accomplish low loss, a high efficiency, a high gain, and a wide band with. In addition, the first to third electrical conductors reduce electromagnetic coupling among them, and thus, are less influenced by surroundings. Furthermore, since the first to third electrical conductors are formed integral with one another, the resultant chip antenna could be fabricated in a simple structure with a low cost, and could be readily analyzed with respect to its operation.
For instance, the chip antenna may further include a dielectric substrate, the first to third electrical conductors being formed anywhere in the dielectric substrate.
As an alternative, the chip antenna may further include a circuit board on which the first to third electrical conductors are formed.
It is preferable that the chip antenna further includes at least one capacitor integrally formed in one of the first and second electrical conductors.
The capacitor would lower a resonance frequency of the chip antenna, and resultingly, would contribute to reduction in a size of the chip antenna.
A plurality of capacitors would provide a plurality of resonance frequencies.
The first to third electrical conductors and the capacitor may be formed on a surface of the dielectric substrate, on a surface of a later mentioned circuit board, or inside the dielectric substrate.
For instance, the capacitor may be comprised of at least one first extension extending from the first electrical conductor to the second electrical conductor and at least one second extension extending from the second electrical conductor to first second electrical conductor such that the first and second extensions are in alignment with each other.
As an alternative, the capacitor may be comprised of at least one extension extending from one of the first and second electrical conductors to the other.
As an alternative, the capacitor may further include at least one capacitor which extends perpendicularly to the first to third electrical conductors in a thickness-wise direction of the dielectric substrate.
The capacitor extending perpendicularly to the first to third electrical conductors in a thickness-wise direction of the dielectric substrate could shorten a length of the first and second electrical conductors.
It is preferable that the chip antenna further includes at least one mianda line having an open end and extending from one of the first and second electrical conductors to the other.
The mianda line would provide the chip antenna with a high inductance.
It is preferable that the chip antenna further includes a capacitive plate defining a capacitance between the capacitive plate and a ground.
It is preferable that the chip antenna further includes a capacitive plate defining a capacitance between the capacitive plate and a ground, the capacitive plate being formed on a surface of the dielectric substrate on which the first to third electrical conductors are formed.
It is preferable that the chip antenna further includes a capacitive plate defining a capacitance between the capacitive plate and a ground and electrically connected to one of the first and second electrical conductors, in which case, the capacitive plate may be formed on a surface of the dielectric substrate other than a surface of the dielectric substrate on which the first to third electrical conductors are formed.
For instance, the first to third electrical conductors may be formed on a surface of the dielectric substrate or on a surface of the circuit board by printing.
The dielectric substrate may be designed to have a multi-layered structure, in which case, the first to third electrical conductors may be printed onto the dielectric substrate.
For instance, the dielectric substrate may be a rectangular-parallelopiped, a cubic, a cylinder, or a polygonal pole in shape.
For instance, the first and second electrical conductors are formed in a line or in a curve.
It is preferable that the first and second electrical conductors have a length equal to or smaller than a quarter of a wavelength of electromagnetic wave emitted from the chip antenna.
It is preferable that the first and second electrical conductors are thinner than the third electrical conductor.
There is further provided a chip antenna including (a) a first electrical conductor having a first end, (b) a second electrical conductor extending in parallel with the first electrical conductor and having a second end located in alignment with the first end, (c) a third electrical conductor extending between the first and second ends perpendicularly to the first and second electrical conductors, and (d) a power-feeding line electrically connected to one of the first and second electrical conductors and extending in parallel with the third electrical conductor, the first to third electrical conductors and the power-feeding line being integrally formed, power being fed to one of the first and second electrical conductors through the power-feeding line.
The first to third electrical conductors arranged in the above-mentioned manner reduce electromagnetic coupling, a current running on a surface of a substrate, and distributed capacitance, and thus, accomplish low loss, a high efficiency, a high gain, and a wide band with. In addition, the first to third electrical conductors reduce electromagnetic coupling among them, and thus, are less influenced by surroundings. Furthermore, since the first to third electrical conductors are formed integral with one another, the resultant chip antenna could be fabricated in a simple structure with a low cost, and could be readily analyzed with respect to its operation.
The power-feeding line may be formed on a surface of a dielectric substrate, for instance, on which the first to third electrical conductors are also formed. The power-feeding line may be formed on a surface of a circuit board, for instance, together with a capacitor. As an alternative, the first to third electrical conductors and the capacitor may be formed on a surface of or inside a dielectric substrate, and the power-feeding line may be formed on a circuit board.
In another aspect of the present invention, there is provided an antenna unit including (a) one of the above-mentioned chip antennas, and (b) a circuit board having a ground area and a non-ground area on a surface thereof, wherein the chip antenna is mounted on a surface of the circuit board such that a power-feeding line of the chip antenna is located in the non-ground area and the ground area acts as a ground plate by which the chip antenna is grounded.
The advantages obtained by the aforementioned present invention will be described hereinbelow.
The first advantage is as follows.
Since the chip antenna in accordance with the present invention includes the first to third electrical conductors configured in the above-mentioned manner, in place of a mianda line which ensures a length necessary for causing resonance, there can be obtained a high impedance between the electrical conductors, resulting in reduction in electromagnetic coupling among the electrical conductors, a current running on a surface of a substrate such as a dielectric substrate, and a distributed capacitance. Hence, the chip antenna and the antenna unit in accordance with the present invention ensure low loss, a high efficiency, a high gain, and a wide band width.
The second advantage is as follows.
The first to third electrical conductors configured in the above-mentioned manner can weaken electromagnetic coupling among them, and hence, ensure a small-sized chip antenna and antenna unit which are less influenced by surroundings.
The third advantage is as follows.
Since the first to third electrical conductors configured in the above-mentioned manner are formed integral with one another, the resultant chip antenna and antenna unit would be fabricated in a simple structure in the small number of fabrication steps with low costs, and could be accurately and readily analyzed with respect to its operation.
The above and other objects and advantageous features of the present invention will be made apparent from the following description made with reference to the accompanying drawings, in which like reference characters designate the same or similar parts throughout the drawings.